1. Field of the Invention
This invention relates to a semiconductor device and more particularly to a semiconductor device having a semiconductor chip or a semiconductor module mounted on a substrate and a soldering portion inspecting method therefor.
2. Description of the Related Art
Recently, with the rapid development of electronics, electronic devices and semiconductor devices used therein are miniaturized. In order to miniaturize the semiconductor (assembling) devices, it is required to mount components such as semiconductor chips with a higher density. As one of the methods for satisfying the above requirements, a flip chip interconnection method is provided.
As is well known in the art, the flip chip interconnection method is the technique for forming solder bumps on the terminal electrodes of the semiconductor chip, aligning the bumps of the semiconductor chip with respective pad electrodes on a wiring board, and then connecting the terminal electrodes of the semiconductor chip to the respective pad electrodes on the wiring board by reflow. Since the terminal electrode of the semiconductor chip is formed on the semiconductor element forming surface and the semiconductor element forming surface is set to face the wiring board when the semiconductor chip is mounted on the wiring board, it is called "face-down bonding".
Since the flip chip interconnection method is to connect the terminal electrode of the semiconductor chip to the board via the solder bump, it is not necessary to provide a space for connection in the peripheral portion of the semiconductor chip unlike the wire bonding method and TAB (Tape Automated Bonding) method. Therefore, the high packing density of the semiconductor chip can be attained and the electrical characteristic can be enhanced because of the short wiring length.
However, since the connecting portion lies in a region below the semiconductor element when the semiconductor chip and the wiring board are connected by the flip chip interconnection method, it is impossible to inspect the connection by external observation. Therefore, defective connection (open, bridge or the like) between the semiconductor element and the wiring board cannot be detected until the operation test for the semiconductor element is effected, thereby causing the manufacturing yield of the semiconductor device to be lowered.
Therefore, a method for previously checking the amount of solder of the solder bump to make the connection quality uniform (U.S. Pat. No. 4,428,676) and a method for inspecting the bump by use of X ray are proposed. However, the former method does not directly inspect the connecting portion and the latter method requires a high equipment cost and is not adequate for 100% inspection.
For this reason, it is desired to develop a flip chip interconnection structure which can easily inspect the connecting portion and a method for inspecting the connecting portion.